processor design | digital system architectur & design

August 2, 2019

I designed an 8-bit MIPS CPU from scratch with Verilog.

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This is the block diagrams I made before writing down the Verilog code.

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I have written & tested the design on Quartus. This design has 16 4-bit assembly commands. Also in the class, we created and modified the 32-bit MIPS processor to handle more assembly commands we like.

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Later on, I modified the MIPS processor design so that it can handle multiple cycle processing.